Digital data is stored and retrieved from memory. Flash memory is a high density memory capable of storing large amounts of data on a single chip. Flash memories are implemented with many memory cells where each cell includes a floating transistor gate. Each memory cell is used to store one or more bits of data.
To erase data on a memory cell, a proper bias is applied to the transistor. After a threshold number of program and erases cycles, the transistor may no longer be able to be reliably programmed or erased, resulting in program failure or data loss. Traditionally, wear leveling algorithms have evened out the erase and programming cycles to extend the lifetime of a flash memory. However, the data in the flash memory may become unrecoverable when the flash memory is under the stress of many read operations or after an extended period of time since the data was last written. Thus relying on the evening out of program and erase cycle alone may not be sufficient to guarantee data reliability. A better way to monitor memory and evaluate its conditions is desired.